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<div id="wrapper"><table width="700" border="1" align="center">  <tr>       <td bgcolor="#CCCCFF" class="title">MC4-6　Ｅ級増幅器によるＥＥＲ送信機の応答を高速化するアーキテクチャ</td>     </tr>     <tr>       <td class="chosha">◎末次　正，空閑祥太郎（福岡大学），魏　秀欽（長崎大学）</td>     </tr>     <tr>       <td class="abst">This paper presents a novel architecture of the<br>envelope elimination and restoration (EER) transmitter with the<br>class-E ampliﬁer. A design example is also given along with<br>the PSpice-simulation results. In the proposed architecture, a<br>MOSFET is added and connected to the dc-feed inductance of the<br>class-E ampliﬁer in parallel, basing on the conventional Envelope<br>Pulse Width Modulation (EPWM)-EER architecture. Therefore,<br>it is possible to obtain no transient-attenuation performance and<br>fast rising-time response by applying the proposed architecture</td>     </tr> </table></div>
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