| Three-dimensional integrated circuits (3D ICs) lead to higher power densities than 2D ICs because of the stacking of multiple device layers. In this paper, we present several useful results obtained by thermal analysis with varying physical parameters of through-silicon-via (TSV) based 3D ICs. The analysis takes into account the effects of a heat sink, package, and printed circuit board on temperature. The factors that the results clarify include 1) the limitation of power dissipation, 2) the impact of the number of stacked chips, 3) the temperature reducing effects of TSVs and thermal interface material, 4) the lateral heat radiation effect, 5) the effects of the position of high/low power density chips, and 6) the impact of each layer under the bottom chip. |